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1 kv rms six-channel digital isolators data sheet ADUM7640/ adum7641/ adum7642/ adum7643 rev. 0 document feedbac k information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 ?2012 analog devices, inc. all rights reserved. technical suppor t www.analog.com features small 20-lead qsop 1000 v rms isolation rating safety and regulatory approvals (pending): ul recognition (pending) 1000 v rms for 1 minute per ul 1577 low power operation 3.3 v operation 1.6 ma per channel maximum at 0 mbps to 1 mbps 7.8 ma per channel maximum at 25 mbps 5 v operation 2.2 ma per channel maximum at 0 mbps to 1 mbps 11.2 ma per channel maximum at 25 mbps bidirectional communication up to 25 mbps data rate (nrz) 3 v/5 v level translation high temperature operation: 105c high common-mode transient immunity: >15 kv/s applications general-purpose, multichannel isolation spi interface/data converter isolation rs-232/rs-422/rs-485 transceivers industrial field bus isolation general description the ADUM7640 / adum7641/ adum7642/ adum7643 1 are 6-channel digital isolators based on the analog devices, inc., i coupler? technology. these 1 kv digital isolation devices are packaged in a small 20-lead qsop. they offer space savings and a lower price than 2.5 kv or 5 kv isolation solutions when only functional isolation is needed. this family, like many analog devices isolators, offers very low power consumption, using one-tenth to one-sixth the power of other digital isolators, with the supply voltage on either side ranging from 3.0 v to 5.5 v. despite their low power consumption, the ADUM7640 / adum7641/ adum7642 / adum7643 provide low pulse width distortion (< 6 ns for c grade) and a channel- by-channel glitch filter to protect the device against extraneous noise disturbances. four channel direction combinations are available with a maximum data rate of 1 mbps or 25 mbps. all products have a default output high logic state in the absence of input power. functional block diagrams v dd1a v dd2a 1 20 gnd 1 gnd 2 2 19 v ia v oa 3 18 encode decode v ib v ob 4 17 encode decode v ic v oc 5 16 encode decode v id v od 6 15 encode decode v dd1b v dd2b 7 14 v ie v oe 8 13 encode decode v if v of 9 12 encode decode gnd 1 gnd 2 10 11 ADUM7640 10448-001 figure 1. ADUM7640 v dd1a v dd2a 1 20 gnd 1 gnd 2 2 19 v ia v oa 3 18 encode decode v ib v ob 4 17 encode decode v ic v oc 5 16 encode decode v id v od 6 15 encode decode v dd1b v dd2b 7 14 v oe v ie 8 13 decode encode v if v of 9 12 encode decode gnd 1 gnd 2 10 11 adum7641 10448-002 figure 2. adum7641 v dd1a v dd2a 1 20 gnd 1 gnd 2 2 19 v ia v oa 3 18 encode decode v ib v ob 4 17 encode decode v ic v oc 5 16 encode decode v od v id 6 15 decode encode v dd1b v dd2b 7 14 v oe v ie 8 13 decode encode v if v of 9 12 encode decode gnd 1 gnd 2 10 11 adum7642 10448-003 figure 3. adum7642 v dd1a v dd2a 1 20 gnd 1 gnd 2 2 19 v ia v oa 3 18 encode decode v ib v ob 4 17 encode decode v oc v ic 5 16 decode encode v od v id 6 15 decode encode v dd1b v dd2b 7 14 v oe v ie 8 13 decode encode v if v of 9 12 encode decode gnd 1 gnd 2 10 11 adum7643 10448-004 figure 4. adum7643 1 protected by u.s. patents 5,952,849; 6,873, 065; and 7,075,329. other patents pending. www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADUM7640/adum7641/adum7642/adum7643 data sheet rev. 0 | page 2 of 20 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 functional block diagrams ............................................................. 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 electrical characteristics 5 v operation ................................ 3 electrical characteristics 3.3 v operation ............................ 5 electrical characteristics mixed 5 v/3.3 v operation ........ 7 electrical characteristics mixed 3.3 v/5 v operation ........ 8 package characteristics ............................................................... 9 regulatory information ............................................................... 9 insulation a nd safety related specifications ............................ 9 recommended operating conditions ...................................... 9 absolute maximum ratings ......................................................... 10 esd caution ................................................................................ 10 pin configurations and function descriptions ......................... 11 typical performance characteris tics ........................................... 15 applications information .............................................................. 17 printed circuit board layout ................................................... 17 propagation delay - related parameters ................................... 17 dc correctness ............................................................................ 17 magnetic field immunity ............................................................. 18 power consumption .................................................................. 19 insulation lifetime ..................................................................... 19 outline dimensions ....................................................................... 20 ordering guide .......................................................................... 20 revision history 9/1 2 revision 0: initial version www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADUM7640/adum7641/adum7642/adum7643 rev. 0 | page 3 of 20 specifications electrical character istics 5 v operation all typical specifications are at t a = 25 c, v dd1 = v dd2 = 5 v. minim um/maximum specifications apply over the entire recommended operation range of 4.5 v v dd1 5.5 v, 4.5 v v dd2 5.5 v, and ? 40c t a + 105c , unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless o therwise noted. table 1. a grade c grade parameter symbol min typ max min typ max unit test conditions /comments switching specifications pulse width pw 250 40 ns within pwd limit data rate 1 25 mbps within pwd limit propagation delay t phl , t plh 75 28 40 50 ns 50% input to 50% output pulse width distortion pwd 25 2 6 ns |t plh ? t phl | change vs. temperature 5 3 ps/c propagation delay skew 1 t psk 20 14 ns channel matching codirectional 2 t pskcd 25 6 12 ns opposing direction al 3 t pskod 30 7 12 ns jitter 2 2 ns 1 t psk is the magnitude of the worst - case difference in t phl or t plh that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 2 codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with in puts on the same side of the isolation barrier. 3 opposing directional c hannel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposit e sides of the isolation barrier. table 2. 1 mbps a and c grades 25 mbps c grade parameter symbol min typ max min typ max unit test conditions/comments supply current no load ADUM7640 i dd1 5.7 7.0 44 54 ma i dd2 4.4 5.9 11 13 ma adum7641 i dd1 5.5 6.8 38 46 ma i dd2 4.6 5.7 15 19 ma adum7642 i dd1 5.2 6.3 31 38 ma i dd2 4.8 6.0 19 24 ma adum7643 i dd1 4.8 6.0 24 30 ma i dd2 5.0 6.3 22 29 ma www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADUM7640/adum7641/adum7642/adum7643 data sheet rev. 0 | page 4 of 20 table 3. parameter symbol min typ max unit test conditions/comments dc specifications input voltage threshold logic high v ih 0.7 v dd x v logic low v il 0.3 v ddx v output voltages logic high v oh v ddx ? 0.1 5.0 v i ox = ?20 a, v ix = v ixh v ddx ? 0.4 4.8 v i ox = ?4 ma, v ix = v ixh logic low v ol 0.0 0.1 v i ox = 20 a, v ix = v ixl 0.2 0.4 v i ox = 4 ma, v ix = v ixl input current per channel i i ? 10 +0.01 +10 a 0 v v i x v ddx supply current per channel quiescent supply current input i ddi (q) 0.95 1.16 ma output i ddo (q) 0.73 0.98 ma dynamic supply current input i ddi (d) 0.26 ma/mbps output i ddo (d) 0.04 ma/mbps ac specifications output rise/fall time t r / t f 2.0 ns 10% to 90% common - mode transient immunity 1 |cm| 15 25 kv/s v ix = v ddx , v cm = 1000 v, transient magnitude = 800 v refresh rate f r 600 khz dc data inputs 1 |cm| is the maximum common - mode voltage slew rate that can be sustained while maintaining v ol < 0.8 v ddl x or v oh > 0.7 v ddix . the common - mode voltage slew rates apply to both rising and falling common - mode voltage edges. www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADUM7640/adum7641/adum7642/adum7643 rev. 0 | page 5 of 20 electrical character istics 3.3 v operation all typical specifications are at t a = 25c, v dd1 = v dd2 = 3.3 v. minimum/maximum specifications apply over the entire recommended operation range of 3.0 v v dd1 3.6 v, 3.0 v v dd2 3.6 v , and ? 40c t a + 105c , unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted. table 4. a grade c grade parameter symbol min typ max min typ max unit test conditions/comments switching specifications pulse width pw 250 40 ns within pwd limit data rate 1 25 mbps within pwd limit propagation delay t phl , t plh 85 33 49 66 ns 50% input to 50% output pulse width distortion pwd 25 2 6 ns |t plh ? t phl | change vs. temperature 5 3 ps/c propagation delay skew 1 t psk 20 14 ns channel matching codirectional 2 t pskcd 25 6 12 ns opposing direction al 3 t pskod 30 6 15 ns jitter 2 2 ns 1 t psk is the magnitude of the worst - case difference in t phl or t plh that is measured between units at the same operating temp erature, supply voltages, and output load within the recommended operating conditions. 2 codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with in puts on the same side of the isolation bar rier. 3 opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposite sides of the isolation barrier. table 5. 1 mbps a and c grades 25 mbps c grade parameter symbol min typ max min typ max unit test conditions/comments supply current no load ADUM7640 i dd1 4.1 5.2 32 38 ma i dd2 3.3 4.3 7.2 8.7 ma adum7641 i dd1 3.9 4.9 27 33 ma i dd2 3.4 4.2 11 13 ma adum7642 i dd1 3.7 4.7 23 27 ma i dd2 3.5 4.4 14 16 ma adum7643 i dd1 3.5 4.4 18 21 ma i dd2 3.6 4.5 16 20 ma www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADUM7640/adum7641/adum7642/adum7643 data sheet rev. 0 | page 6 of 20 table 6. parameter symbol min typ max unit test conditions/comments dc specifications in put voltage thr eshold logic high v ih 0.7 v ddx v logic low v il 0.3 v ddx v output voltages logic high v oh v ddx ? 0.2 3.3 v i ox = ?20 a, v ix = v ixh v ddx ? 0. 5 3.1 v i ox = ?4 ma, v ix = v ixh logic low v ol 0.0 0.1 v i ox = 20 a, v ix = v ixl 0.2 0.4 v i ox = 4 ma, v ix = v ixl input current per channel i i ? 10 +0.01 +10 a 0 v v ix v ddx supply current per channel quiescent supply current input i ddi (q) 0.68 0.87 ma output i ddo (q) 0.55 0.72 ma dynamic supply current input i ddi (d) 0. 19 ma/mbps output i ddo (d) 0.03 ma/mbps ac specifications output rise/fall time t r /t f 2.8 ns 10% to 90% common - mode transient immunity 1 |cm| 15 20 kv/s v ix = v ddx , v cm = 1000 v, transient magnitude = 800 v refresh rate f r 550 khz dc data inputs 1 |cm| is the maximum common - mode voltage slew rate that can be su stained while maintaining v o l < 0.8 v ddl x or v o h > 0. 7 v ddi x . the common - mode voltage slew rates apply to both rising and falling common - mode voltage edges. www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADUM7640/adum7641/adum7642/adum7643 rev. 0 | page 7 of 20 electrical character istics mixed 5 v/3.3 v oper ation all typical specifications are at t a = 25c, v dd1 = 5 v, v dd2 = 3.3 v. minimum/maximum specifications apply over the entire recom - mended operation range of 4.5 v v dd1 5.5 v, 3.0 v v dd2 3.6 v , and ? 40c t a + 105c , unless otherwise noted. switching specifications are teste d with c l = 15 pf and cmos signal levels, unless otherwise noted. table 7. a grade c grade parameter symbol min typ max min typ max unit test conditions/comments switching specifications pulse width pw 250 40 ns within pwd limit data rate 1 25 mbps within pwd limit propagation delay t phl , t plh 80 30 42 58 ns 50% input to 50% output pulse width distortion pwd 25 2 6 ns |t plh ? t phl | change vs. temperature 5 3 ps/c propagation delay skew 1 t psk 20 14 ns channel matching codirectional 2 t pskcd 25 5 15 ns opposing direction al 3 t pskod 30 8 15 ns jitter 2 2 ns 1 t psk is the magnitude of the worst - case difference in t phl or t plh that is measured between uni ts at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 2 codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with in puts on the s ame side of the isolation barrier. 3 opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposite sides of the isolation barrier. table 8. 1 mbps a, c grades 25 mbps c grade parameter symbol min typ max min typ max unit test conditions/comments supply current no load ADUM7640 i dd1 5.7 7.0 44 54 ma i dd2 3.3 4.1 7.5 8.7 ma adum7641 i dd1 5.4 6.8 38 46 ma i dd2 3.4 4.0 11 13 ma adum7642 i dd1 5.1 6.3 31 38 ma i dd2 3.5 4.3 14 16 ma adum7643 i dd1 4.8 6.0 24 30 ma i dd2 3.6 4.3 16 20 ma table 9. parameter symbol min typ max unit test conditions/comments dc specifications input voltage thresh old logic high v ih 0.7 v ddx v logic low v il 0.3 v ddx v output voltages logic high v oh v ddx ? 0.1 v ddx v i ox = ?20 a, v ix = v ixh v ddx ? 0. 5 v ddx ? 0.2 v i ox = ?4 ma, v ix = v ixh logic low v ol 0.0 0.1 v i ox = 20 a, v ix = v ixl 0.2 0.4 v i ox = 4 ma, v ix = v ixl input current per channel i i ? 10 +0.01 +10 a 0 v v ix v ddx ac specifi cations output rise/fall time t r /t f 2.5 ns 10% to 90% common - mode transient immunity 1 |cm| 15 20 kv/s v ix = v ddx , v cm = 1000 v, transient magnitude = 800 v refresh rate f r 600 khz dc data inputs 1 |cm| is the maximum common - mode voltage slew rate that can be sustained while maintaining v o l < 0.8 v ddl x or v o h > 0. 7 v ddi x . t he common - mode voltage slew rates apply to both rising and falling common - mode voltage edges. www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADUM7640/adum7641/adum7642/adum7643 data sheet rev. 0 | page 8 of 20 electrical character istics mixed 3.3 v/5 v op eration all typical specifications are at t a = 25c, v dd1 = 3.3 v, v dd2 = 5 v. minimum/maximum specifications apply over the entire recom - mended operation range of 3.0 v v dd1 3.6 v, 4.5 v v dd2 5.5 v, and ? 40c t a + 105c , unless otherwise noted. switching specifications are tested with c l = 15 pf and cmos signal levels, unless otherwise noted. table 10. a grade c grade parame ter symbol min typ max min typ max unit test conditions/comments switching specifications pulse width pw 250 40 ns within pwd limit data rate 1 25 mbps within pwd limit propagation delay t phl , t plh 80 29 46 60 ns 50% input to 50% ou tput pulse width distortion pwd 25 2 6 ns |t plh ? t phl | change vs. temperature 5 3 ps/c propagation delay skew 1 t psk 20 14 ns channel matching codirectional 2 t pskcd 25 6 13 ns opposing direction al 3 t pskod 30 9 18 ns jitter 2 2 ns 1 t psk is the magnitude of the worst - c ase difference in t phl or t plh that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. 2 codirectional channel matching is the absolute value of the difference in propa gation delays between any two channels with inputs on the same side of the isolation barrier. 3 opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposite sides of th e isolation barrier. table 11. 1 mbps a, c grades 25 mbps c grade parameter symbol min typ max min typ max unit test conditions/comments supply current no load ADUM7640 i dd1 4.1 4.9 32 38 ma i dd2 4.5 5.9 11 13 ma adum7641 i dd1 3.9 4.7 27 33 ma i dd2 4.6 5.7 15 19 ma adum7642 i dd1 3.7 4.4 23 27 ma i dd2 4.8 6.0 19 24 ma adum7643 i dd1 3.5 4.2 18 21 ma i dd2 5.0 6.2 22 29 ma table 12. parameter symbol min typ max unit test conditions/comments dc specifications inp ut voltage t hreshold logic high v ih 0.7 v ddx v logic low v il 0.3 v ddx v output voltages logic high v oh v ddx ? 0.1 v ddx v i ox = ?20 a, v ix = v ixh v ddx ? 0. 5 v ddx ? 0.2 v i ox = ?4 ma, v ix = v ixh logic low v ol 0.0 0.1 v i ox = 20 a, v ix = v ixl 0.2 0.4 v i ox = 4 ma, v ix = v ixl input current per channel i i ? 10 +0.01 +10 a 0 v v ix v ddx ac specif ications output rise/fall time t r /t f 2.5 ns 10% to 90% common - mode transient immunity 1 |cm| 15 20 kv/s v ix = v ddx , v cm = 1000 v, transient magnitude = 800 v refresh rate f r 550 khz dc data inputs 1 |cm| is the maximum common - mode voltage slew rate that can be sustained while maintaining vol < 0.8 vddlx or voh > 0.7 vddix. the common - mode voltage slew rat es apply to both rising and falling common - mode voltage edges. www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADUM7640/adum7641/adum7642/adum7643 rev. 0 | page 9 of 20 package characterist ics table 13. parameter symbol min typ max unit test conditions/comments resistance (input to output) 1 r i- o 10 13 ? capacitance (input to outpu t) 1 c i- o 2 pf f = 1 mhz input capacitance 2 c i 4.0 pf ic junction - to - ambient thermal resistance ja 76 c/w thermocouple located at center of package underside 1 the device is considered a 2 - terminal device: pin 1 through pin 10 are shorted together , and pin 11 through pin 20 are shorted together. 2 input capacitance is from any input data pin to ground. regulatory informati on the ADUM7640 / adum7641 / adum7642 / adum7643 are approved by the organizations listed in table 14 . see table 18 and the insulation lifetime section fo r recommended maximum working voltages for specific cross - isolation waveforms and insulation levels. table 14. ul (pending) recognized u nder ul 1577 component recognition program 1 single protection,1000 v rms isolation voltage fi le e274400 1 in accordance with ul 1577, each ADUM7640 / adum7641 / adum7642 / adum7643 is proof tested by applying an insulation test voltage 1200 v rms for 1 sec (current leakage detection limit = 5 a). insulation and safet y related specifications table 15. parameter symbol value unit test conditions/comments rated dielectric insulation voltage 1000 v rms 1 minute duration minimum external air gap (clearance) l(i01) 3.8 mm min measured from input terminals to output terminals, shortest distance through air minimum external tracking (creepage) l(i02) 2.8 mm min measured from input terminals to output terminals, shortest distance path along body minimum internal gap (internal clearance) 2.6 m min insulation distance through insulation tracking resistance (comparative tracking index) cti >4 00 v din iec 112/vde 0303 part 1 isolation group ii material group (din vde 0110, 1/89, table 1) case temperature (c) safety-limiting current (ma) 0 0 350 300 250 200 150 100 50 50 100 150 200 10448-005 figure 5 . thermal derating curve, dependence of safety - limiting values on case temperature per din v vde v 0884 - 10 recommended operatin g conditions table 16. parameter symbol min max unit operating temperature t a ? 40 +105 c su pply voltages 1 v dd1 , v dd2 3.0 5.5 v input signal rise and fall times 1.0 ms 1 all voltages are relative to their respective ground s . see the dc correctness section for info rmation about immunity to external magnetic fields . www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADUM7640/adum7641/adum7642/adum7643 data sheet rev. 0 | page 10 of 20 absolute maximum rat ings t a = 25c, unless otherwise noted. table 17. parameter rating storage temperature (t st ) range ? 65c to +150c ambient op erating temperature (t a ) ? 40c to +105c supply voltages (v dd1 , v dd2 ) ? 0.5 v to +7.0 v input voltages (v ia , v ib , v ic , v id , v ie , v if ) 1, 2 ? 0.5 v to v ddi + 0.5 v output voltages (v oa , v ob , v oc , v od , v ie , v if ) 1, 2 ? 0.5 v to v ddo + 0.5 v average output cur rent per pin 3 side 1 (i o1 ) ? 10 ma to +10 ma side 2 (i o2 ) ? 10 ma to +10 ma common - mode transients 3 ? 100 kv/s to +100 kv/s 1 v ddi and v ddo refer to the supply voltages on the input and output sides of a given channel, respectively. see the p rinted c ircuit board layout section. 2 see figure 5 for maximum rated current values for various temperatures. 3 refers to common - mode transients across the insulation barrier. comm on - mode transients exceeding the absolute maximum ratings may cause latch - up or permanent damage. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of t he device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution table 18 . maximum continuous working voltage 1 parameter max unit constraint ac voltage, bipolar waveform 420 v peak 50- year minimum lifetime ac voltage, unipolar waveform basic insulation 420 v peak 50- year minimum lifetime dc voltag e basic insulation 420 v peak 50- year minimum lifetime 1 refers to continuous voltage magnitude imposed across the isolation barrier. see the insulation lifetime section for more information . table 19 . truth table (positive logic) v ix input 1 v ddi state 2 v ddo state 3 v ox output 1 description h powered powered h nor mal operation; data is high. l powered powered l normal operation; data is low. x unpowered powered h input unpowered. output pin s are in the default high state. outputs return to input state within 1.6 s of v ddi power restoration. see the pin function descriptions ( table 20 through table 23) for more information . x powered unpowered z output unpowered. output pins are in high impedance state. outputs return to input state within 1.6 s of v ddo power restoration. see the pin function descriptions ( table 20 through table 23 table 22) for more information . 1 v ix and v ox refer to the input and output signal s of a given channel (a, b, c, d , e or f ). 2 v ddi refers to the supply voltage on the input side of a given channel (a, b, c, d , e or f ). 3 v ddo refers to the supply voltage on the output side of a given channel (a, b, c, d , e or f ). www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADUM7640/adum7641/adum7642/adum7643 rev. 0 | page 11 of 20 pin configurations a n d function descripti ons * pin 2 and pin 10 are internally connected. connecting both pins to pcb side 1 ground is recommended. pin 11 and pin 19 are internally connected. connecting both pins to pcb side 2 ground is recommended. 1 2 3 4 20 19 18 17 5 16 6 15 7 14 9 12 10 11 8 13 ADUM7640 top view (not to scale) v dd1a gnd 1 * v ia v ib v ic v id v dd1b v ie v if gnd 1 * v dd2a gnd 2 * v oa v ob v oc v od v dd2b v oe v of gnd 2 * 10448-006 figure 6 . ADUM7640 pin configuration table 20. ADUM7640 pin function descriptions p in no. mnemonic description 1 v dd1a supply voltage a for isolator side 1 (3.0 v to 5.5 v). pin 1 must be connected externally to pin 7. connect a 0.01 f to 0.1 f between v dd1a (pin 1) and gnd 1 (pin 2). 2 gnd 1 ground r eference for isolator side 1. pin 2 and pin 10 are internally connected, and connecting both pins to the pcb ground plane is recom mended. 3 v ia logic input a. 4 v ib logic input b. 5 v ic logic input c. 6 v id logic input d. 7 v dd1b supply voltage b for isolator side 1 (3.0 v to 5.5 v). pin 7 must be connected externally to pin 1. connect a 0.01 f to 0.1 f between v dd1b (pin 7) and gnd 1 (pin 10). 8 v ie logic input e. 9 v if logic input f. 10 gnd 1 ground r eference for isolator side 1. pin 2 and pin 10 are internally connected, and conn ecting both pins to the pcb ground plane is recommended. 11 gnd 2 ground r eference for isolator side 2. pin 11 and pin 19 are internally connected, and connecting both pins to the pcb ground plane is recommended. 12 v of logic output f. 13 v oe logic outpu t e. 14 v dd2b supply voltage b for isolator side 2 (3.0 v to 5.5 v). pin 14 must be connected externally to pin 20. connect a 0.01 f to 0.1 f between v dd2b (pin 14 ) and gnd 2 (pin 1 1). 15 v od logic output d. 16 v oc logic output c. 17 v ob logic output b. 18 v oa logic output a. 19 gnd 2 ground r eference for isolator side 2. pin 11 and pin 19 are internally connected, and connecting both pins to the pcb ground plane is recommended. 20 v dd2a supply voltage a for isolator side 2 (3.0 v to 5.5 v). pin 20 must be connected externally to pin 14. connect a 0.01 f to 0.1 f between v dd2a (pin 20) and gnd 2 (pin 19). reference the an - 1109 application note f or specific la yout guidelines . www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADUM7640/adum7641/adum7642/adum7643 data sheet rev. 0 | page 12 of 20 * pin 2 and pin 10 are internally connected. connecting both pins to pcb side 1 ground is recommended. pin 11 and pin 19 are internally connected. connecting both pins to pcb side 2 ground is recommended. 1 2 3 4 20 19 18 17 5 16 6 15 7 14 9 12 10 11 8 13 adum7641 top view (not to scale) v dd1a gnd 1 * v ia v ib v ic v id v dd1b v oe v if gnd 1 * v dd2a gnd 2 * v oa v ob v oc v od v dd2b v ie v of gnd 2 * 10448-007 figure 7 . adum7641 pin configuration table 21. adum7641 pin function descriptions pin no. mnemonic description 1 v dd1a supply voltage a for isolator side 1 (3.0 v to 5.5 v). pin 1 must be connected externally to pin 7. connect a 0.01 f to 0.1 f between v dd1a (pin 1) and gnd 1 (pin 2). 2 gnd 1 ground r eference for isolator side 1. pin 2 and pi n 10 are internally connected, and connecting both pins to the pcb ground plane is recommended. 3 v ia logic input a. 4 v ib logic input b. 5 v ic logic input c. 6 v id logic input d. 7 v dd1b supply voltage b for isolator side 1 (3.0 v to 5.5 v). pin 7 mu st be connected externally to pin 1. connect a 0.01 f to 0.1 f between v dd1b (pin 7) and gnd 1 (pin 10). 8 v oe logic output e. 9 v if logic input f. 10 gnd 1 ground r eference for isolator side 1. pin 2 and pin 10 are internally connected, and connecting both pins to the pcb ground plane is recommended. 11 gnd 2 ground r eference for isolator side 2. pin 11 and pin 19 are internally connected, and connecting both pins to the pcb ground plane is recommended. 12 v of logic output f. 13 v ie logic input e. 14 v dd2b supply voltage b for isolator side 2 (3.0 v to 5.5 v). pin 14 must be connected externally to pin 20. connect a 0.01 f to 0.1 f between v dd2b (pin 1 4 ) and gnd 2 (pin 1 1). 15 v od logic output d. 16 v oc logic output c. 17 v ob logic output b. 18 v oa logic output a. 19 gnd 2 ground r eference for isolator side 2. pin 11 and pin 19 are internally connected, and connecting both pins to the pcb ground plane is recommended. 20 v dd2a supply voltage a for isolator side 2 (3.0 v to 5.5 v). pin 20 must be connected externally to pin 14. connect a 0.01 f to 0.1 f between v dd2a (pin 20) and gnd 2 (pin 19). reference the an - 1109 application note f or specific layout gui delines . www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADUM7640/adum7641/adum7642/adum7643 rev. 0 | page 13 of 20 * pin 2 and pin 10 are internally connected. connecting both pins to pcb side 1 ground is recommended. pin 11 and pin 19 are internally connected. connecting both pins to pcb side 2 ground is recommended. 1 2 3 4 20 19 18 17 5 16 6 15 7 14 9 12 10 11 8 13 adum7642 top view (not to scale) v dd1a gnd 1 * v ia v ib v ic v od v dd1b v oe v if gnd 1 * v dd2a gnd 2 * v oa v ob v oc v id v dd2b v ie v of gnd 2 * 10448-008 figure 8 . adum7642 pin configuration table 22. adum7642 pin function descriptions pin no. mnemonic description 1 v dd1a supply voltage a for isolator side 1 (3.0 v to 5.5 v). pin 1 must be connected externally to pin 7. connect a 0.01 f to 0.1 f between v dd1a (pin 1) and gnd 1 (pin 2). 2 gnd 1 ground r eference for isolator side 1. pin 2 and pin 10 are internally connected, and connecting both pins to the pcb ground plane is recommended. 3 v ia logic input a. 4 v ib logic input b. 5 v ic logic input c. 6 v od logic output d. 7 v dd1b supply voltage b for isolator side 1 (3.0 v to 5.5 v). pin 7 must be c onnected externally to pin 1. connect a 0.01 f to 0.1 f between v dd1b (pin 7) and gnd 1 (pin 10). 8 v oe logic output e. 9 v if logic input f. 10 gnd 1 ground r eference for isolator side 1. pin 2 and pin 10 are internally connected, and connecting both pi ns to the pcb ground plane is recommended. 11 gnd 2 ground r eference for isolator side 2. pin 11 and pin 19 are internally connected, and connecting both pins to the pcb ground plane is recommended. 12 v of logic output f. 13 v ie logic input e. 14 v dd2b supply voltage b for isolator side 2 (3.0 v to 5.5 v). pin 14 must be connected externally to pin 20. connect a 0.01 f to 0.1 f between v dd2b (pin 1 4 ) and gnd 2 (pin 1 1). 15 v id logic input d. 16 v oc logic output c. 17 v ob logic output b. 18 v oa logi c output a. 19 gnd 2 ground r eference for isolator side 2. pin 11 and pin 19 are internally connected, and connecting both pins to the pcb ground plane is recommended. 20 v dd2a supply voltage a for isolator side 2 (3.0 v to 5.5 v). pin 20 must be connecte d externally to pin 14. connect a 0.01 f to 0.1 f between v dd2a (pin 20) and gnd 2 (pin 19). reference the an - 1109 application note f or specific layout guidelines . www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADUM7640/adum7641/adum7642/adum7643 data sheet rev. 0 | page 14 of 20 * pin 2 and pin 10 are internally connected. connecting both pins to pcb side 1 ground is recommended. pin 11 and pin 19 are internally connected. connecting both pins to pcb side 2 ground is recommended. 1 2 3 4 20 19 18 17 5 16 6 15 7 14 9 12 10 11 8 13 adum7643 top view (not to scale) v dd1a gnd 1 * v ia v ib v oc v od v dd1b v oe v if gnd 1 * v dd2a gnd 2 * v oa v ob v ic v id v dd2b v ie v of gnd 2 * 10448-009 figure 9 . adum7643 pin configuration table 23. adum7643 pin function descriptions pin no. mnemonic descrip tion 1 v dd1a supply voltage a for isolator side 1 (3.0 v to 5.5 v). pin 1 must be connected externally to pin 7. connect a 0.01 f to 0.1 f between v dd1a (pin 1) and gnd 1 (pin 2). 2 gnd 1 ground r eference for isolator side 1. pin 2 and pin 10 are interna lly connected, and connecting both pins to the pcb ground plane is recommended. 3 v ia logic input a. 4 v ib logic input b. 5 v oc logic output c. 6 v od logic output d. 7 v dd1b supply voltage b for isolator side 1 (3.0 v to 5.5 v). pin 7 must be connecte d externally to pin 1. connect a 0.01 f to 0.1 f between v dd1b (pin 7) and gnd 1 (pin 10). 8 v oe logic output e. 9 v if logic input f. 10 gnd 1 ground r eference for isolator side 1. pin 2 and pin 10 are internally connected, and connecting both pins to t he pcb ground plane is recommended. 11 gnd 2 ground r eference for isolator side 2. pin 11 and pin 19 are internally connected, and connecting both pins to the pcb ground plane is recommended. 12 v of logic output f. 13 v ie logic input e. 14 v dd2b supply voltage b for isolator side 2 (3.0 v to 5.5 v). pin 14 must be connected externally to pin 20. connect a 0.01 f to 0.1 f between v dd2b (pin 1 4 ) and gnd 2 (pin 1 1). 15 v id logic input d. 16 v ic logic input c. 17 v ob logic output b. 18 v oa logic output a. 19 gnd 2 ground r eference for isolator side 2. pin 11 and pin 19 are internally connected, and connecting both pins to the pcb ground plane is recommended. 20 v dd2a supply voltage a for isolator side 2 (3.0 v to 5.5 v). pin 20 must be connected extern ally to pin 14. connect a 0.01 f to 0.1 f between v dd2a (pin 20) and gnd 2 (pin 19). reference the an - 1109 application note f or specific layout guidelines . www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADUM7640/adum7641/adum7642/adum7643 rev. 0 | page 15 of 20 typic al performance chara cteristics 0 5 10 15 20 25 30 data rate (mbps) 3.3v 5v 10 8 6 4 2 0 current (ma) 10448-010 figure 10 . typical supply current per input channel vs. data rate for 5 v and 3 .3 v operation 0 5 10 15 20 25 30 data rate (mbps) 4 3 2 1 0 current (ma) 10448-011 5v 3.3v figure 11 . typical supply current per output channel vs. data rate for 5 v and 3 .3 v operation (no output load) 0 5 10 15 20 25 30 data rate (mbps) 4 3 2 1 0 current (ma) 10448-012 5v 3.3v figure 12 . typical supply current per output channel vs. data rate for 5 v and 3 .3 v operation (15 pf output load) 0 5 10 15 20 25 data rate (mbps) 45 40 35 30 25 20 15 10 5 0 i dd1 current (ma) 10448-013 5v 3.3v figure 13 . typical ADUM7640 v dd1 supply current vs. data rate for 5 v and 3 .3 v operation 0 5 10 15 20 25 data rate (mbps) 12 10 8 6 4 2 0 i dd2 current (ma) 10448-014 5v 3.3v figure 14 . typical ADUM7640 v dd2 supply current vs. data rate for 5 v and 3 .3 v opera tion 0 5 10 15 20 25 data rate (mbps) 40 35 30 25 20 15 10 5 0 i dd1 current (ma) 10448-015 5v 3.3v figure 15 . typical adum7641 v dd1 supply current vs. data rate for 5 v and 3 .3 v operation www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADUM7640/adum7641/adum7642/adum7643 data sheet rev. 0 | page 16 of 20 0 5 10 15 20 25 data rate (mbps) 18 14 16 12 10 8 6 4 2 0 i dd2 current (ma) 10448-016 5v 3.3v figure 16 . typical adum7641 v dd2 supply current vs. data rate for 5 v and 3 .3 v operation 0 5 10 15 20 25 data rate (mbps) 35 25 30 20 15 10 5 0 i dd1 current (ma) 10448-017 5v 3.3v figure 17 . typical adum7642 v dd1 supply current vs. data rate for 5 v and 3 .3 v operation 0 5 10 15 20 25 data rate (mbps) 25 20 15 10 5 0 i dd2 current (ma) 10448-018 5v 3.3v fi gure 18 . typical adum7642 v dd2 supply current vs. data rate for 5 v and 3 .3 v operation 0 5 10 15 20 25 data rate (mbps) 30 25 20 15 10 5 0 i dd1 current (ma) 10448-019 5v 3.3v figure 19 . typical adum7643 v dd1 or v dd2 supply current vs. data rate for 5 v and 3 .3 v operation www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADUM7640/adum7641/adum7642/adum7643 rev. 0 | page 17 of 20 applications informa tion p rinted c ircuit board layout the ADUM7640 / adum7641 / adum7642 / adum7643 digital isolator s require no external interface circuitry for the logic interfaces. power supply bypassing is strongly recommended at the inp ut and output supply pins ( see figure 20 ) . connect f our bypass capacitors between pin 1 and pin 2 for v dd1a , betwee n pin 7 and pin 10 for v dd1b , between pin 11 and pin 14 for v dd2b , and between pin 19 and pin 20 f or v dd2a . connect the v dd1a supply pi n and the v dd1b supply p in together , and connect the v dd2b supply p in and v dd2a supply p in together. the capacitor values should be from 0.01 f to 0.1 f. the total lead length between both ends of the capacitor and th e power supply pin should not exceed 20 mm . v dd1a gnd 1 v ia v ib v ic /v oc v id /v od v dd1b v ie /v oe v if gnd 1 v dd2a gnd 2 v oa v ob v oc /v ic v od /v id v dd2b v oe /v ie v of gnd 2 10448-020 figure 20 . recommended printed circuit board layout in applications involving high common - mode transients, it is important to minimize board coupling across the isolation barrier. furt hermore, users should design the board layout so that any coupling that occur s affects all pins equally on a given component side. failure to follow t his design guideline can cause voltage differentials between pins that exceed the absolute maximum ratings of the device, which can lead to latch - up or permanent damage. w ith proper pcb design choices , t he ADUM7640 / adum7641 / adum7642 / adum7643 c an readily meet cispr 22 class a (and fcc class a) emissions standards, as well as the more stringent cispr 22 class b (and fcc class b) standards in an unshielded envi ronment . f or p cb - related emi mitigation techniques, including board layout and stack - up issues , see the an - 1109 application note . propagation delay - related parameters propagation delay is a parameter that describes the tim e it takes a logic signal to propagate through a component. the input - to - output propagation delay time for a high - to - low transition may d iffer from the propagation delay time for a low - to - high transition. input (v ix ) output (v ox ) t plh t phl 50% 50% 10448-021 figure 21 . propagation delay parameters pulse width distortion is the maximum difference between these two propagation delay values and is an indication of how accurately the timing of the input signal is preserved. channel - to - channel matching refers to the maximum amount of tim e that the propagation delay differs between channels within a single ADUM7640 / adum7641 / adum7642 / adum7643 component. propagation delay skew refers to the maximum amount of time that the propagation delay differs between multiple ADUM7640 / adum7641 / adum7642 / adum7643 components operating under the same conditions. dc correctness positive and negative logic transitions at the isolat or input cause narrow (~1 ns) pulses to be sent to the decoder using the transformer. the decoder is bistable and is, therefore, either set or reset by the pulses, indicating input logic transitions. in the absence of logic transitions at the input for mor e than ~1 s, a periodic set of refresh pulses indicative of the correct input state is sent to ensure dc correctness at the output. if the decoder receives no internal pulses for more than approximately 5 s, the input sid e is assumed to be unpowered or n onfunctional, in which case the isolator output is forced to a default high state by the watchdog timer circuit. www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADUM7640/adum7641/adum7642/adum7643 data sheet rev. 0 | page 18 of 20 magnetic field immun ity the magnetic field immunity of the ADUM7640 / adum7641 / adum7642 / adum7643 is determined by the changing magnetic f ield, which induces a voltage in the transformer receiving coil large e nough to either falsely set or reset the decoder. the following a nalysis defines the conditions under which this can occur. the 3 v operating condition of the ADUM7640 / adum7641 / adum7642 / adum7643 is examined because it represents the most susceptible mode of operation. the pulses at the transformer output have an ampli tude greater than 1.0 v. the decoder has a sensing threshold at approximately 0.5 v, thus establishing a 0.5 v margin in which induced voltages can be tolerated. the voltage induced across the receiving coil is given by v = (? d /dt ) r n 2 ; n = 1, 2, , n where: is magnetic flux density (gauss). r n is the radius of the n th turn in the receiving coil (cm). n is the total number of turns in the receiving coil. given the geometry of the receiving coil in the ADUM7640 / adum7641 / adum7642 / adum7643 and an imposed requirement that the induced voltage be, at most, 50% of th e 0.5 v margin at the decoder, a maximum allowable magnetic field at a given frequency can be calculated. the result is shown in figure 22 . 1000 100 10 1 0.1 0.01 0.001 1k 100m 10k maximum allowable magnetic flux (kgauss) 100k 1m 10m magnetic field frequency (hz) 10448-022 figure 22 . maximum allowable external magn etic flux density for example, at a magnetic field frequency of 1 mhz, the maximum allowable magnetic field of 0.5 kgauss induces a voltage of 0.25 v a t the receiving coil. this voltage is approximately 50% of the sensing threshold and does not cause a fau lty output transition. sim ilarly, if such an event occurs during a transmitted pulse and i s of the worst - case polarity , it reduce s the received pulse from >1.0 v to 0.75 v, still well above the 0.5 v sensing threshold of the decoder. the preceding magneti c flux density values correspond to specific current magnitudes at given distances from the ADUM7640 / adum7641 / adum7642/ adum7643 transformers. figure 23 shows these allowable current magnitudes as a function of frequency for selected distances. as shown in figure 23 , the ADUM7640 / adum7641 / adum7642 / adum7643 are ext remely immune and can be affected only by extremely large currents operated at high frequency very close to the component. for the 1 mhz example noted previously, a 1.2 ka current would have to be placed 5 mm away from the ADUM7640 / adum7641 / adum7642 / adum7643 to affect the operation of the component. 1000 100 10 1 0.1 0.01 1k 100m 10k maximum allowable current (ka) 100k 1m 10m magnetic field frequency (hz) distance = 5mm distance = 1m distance = 100mm 10448-023 figure 23 . maximum allowable current for various current - to - ADUM7640 / adum7641 / adum7642 / adum7643 spacings note that at combinations of strong magnetic field and high frequency, any loops formed by printed circuit board traces can induce error voltages sufficiently large to trigger the thresholds of succeeding circuitry. ta ke c are in the layout of such traces to avoid this possibility. www.datasheet.net/ datasheet pdf - http://www..co.kr/
data sheet ADUM7640/adum7641/adum7642/adum7643 rev. 0 | page 19 of 20 power consumption the supply current at a given channel of the ADUM7640 / adum7641 / adum7642 / adum7643 isolator is a function of the supply voltage, the data rate of the channel, and the output load of the channel. for each input channel, the sup ply current is given by i ddi = i ddi ( q ) f 0.5 f r i ddi = i ddi (d) (2 f ? f r ) + i ddi ( q ) f > 0.5 f r for each output channel, the supply current is given by i ddo = i ddo ( q ) f 0.5 f r i ddo = ( i ddo ( d ) + (0.5 10 ? 3 ) c l v ddo ) (2 f ? f r ) + i ddo ( q ) f > 0.5 f r where: i ddi (d) , i ddo (d) are the input and output dynamic supply currents per channel (ma/mbps). i ddi (q) , i ddo (q) are the specified input and output quiescent supply currents (ma). f is the input logic signal frequency (mhz); it is half the input data rate, expressed in units of mbps. f r is the input stage refresh rate (mbps). c l is the output load capacitance (pf). v ddo is the output supply voltage (v). to calculate the total v dd1 and v dd2 supply current, the supply currents for each input and output channel corresponding to v dd1 and v dd2 are calculated and totaled. figure 10 and figure 11 show per - channel supply currents as a function of data rate for an unloaded output condition. figure 12 shows the per - channel supply current as a function of data rate for a 15 pf output condition. figure 13 through figure 17 show the total v dd 1 and v dd2 supply current as a function of data rate for ADUM7640 / adum7641 / adum7642 / adum7643 channel configurations. insulation lifetime all insulation structures eventually break down when subjected to voltage stress over a sufficiently long period. the rate of insulation degradation depends on the characteristics o f the voltage waveform applied across the insulation. in addition to the testing performed by the regulatory agencies, analog devices carries out an extensive set of evaluations to determine the lifetime of the insulation structure within the ADUM7640 / adum7641 / adum7642 / adum7643 components . analog devices performs acc elerated life testing using voltage levels higher than the rated continuous working voltage. accel - eration factors for several operating conditions are determined. these factors allow calculation of the time to failure at the actual working voltage. the va lues shown in table 18 summarize the peak voltage for 50 years of service life for a bipolar ac operating condition and the maximum working voltages. in many cases, the approved working voltage is higher than the 5 0 - year service life voltage. operation at these high working voltages can lead to shortened insulation life in some cases. the insulation lifetime of the ADUM7640 / adum7641 / adum7642 / adum7643 depends on the voltage waveform type imposed across the isolation barrier. the i coupler insulation structure degrades at differe nt rates depending on whether the waveform is bipolar ac, unipolar ac, or dc. figure 24, figure 25, and figure 26 illustrate these different isolation voltage waveforms. bipolar ac voltage is the most stringent environment. the goal of a 50 - year operating lifetime under the bipolar ac condition determines the analog devices recommended maximum working voltage. in the case of u nipolar ac or dc voltage, the stress on the insu lation is significantly lower. this allows operation at higher working voltages while still achieving a 50 - year service life. the working voltages listed in table 18 can be applied while maintaining the 50- year minimum lifetime , provided that the voltage conforms to either the unipolar ac or dc voltage case. any cross - insulation voltage waveform that does not conform to figure 25 or figure 26 should be treated as a bipolar ac waveform, and its peak voltage should be limited to the 50 - year lifetime voltage value listed in table 18. t he voltage pre sented in figure 25 is shown as sinusoidal for illustration purposes only. it is meant to represent any voltage waveform varying between 0 v and some limiting value. the limiting value can be positive or negative, but the voltage cannot cross 0 v. 0v rated peak voltage 10448-024 figure 24 . bipolar ac waveform 0v rated peak voltage 10448-025 figure 25 . unipolar ac waveform 0v rated peak voltage 10448-026 figure 26 . dc waveform www.datasheet.net/ datasheet pdf - http://www..co.kr/
ADUM7640/adum7641/adum7642/adum7643 data sheet rev. 0 | page 20 of 20 outline dimensions c o m p l i a n t t o j e d e c s t a n d a r d s m o - 1 3 7 - a d c o n t r o l l i n g d i m e n s i o n s a r e i n i n c h e s ; m i l l i m e t e r d i m e n s i o n s ( i n p a r e n t h e s e s ) a r e r o u n d e d - o f f i n c h e q u i v a l e n t s f o r r e f e r e n c e o n l y a n d a r e n o t a p p r o p r i a t e f o r u s e i n d e s i g n . 2 0 1 1 1 0 1 s e a t i n g p l a n e 0 . 0 1 0 ( 0 . 2 5 ) 0 . 0 0 4 ( 0 . 1 0 ) 0 . 0 1 2 ( 0 . 3 0 ) 0 . 0 0 8 ( 0 . 2 0 ) 0 . 0 2 5 ( 0 . 6 4 ) b s c 0 . 0 4 1 ( 1 . 0 4 ) r e f 0 . 0 1 0 ( 0 . 2 5 ) 0 . 0 0 6 ( 0 . 1 5 ) 0 . 0 5 0 ( 1 . 2 7 ) 0 . 0 1 6 ( 0 . 4 1 ) 0 . 0 2 0 ( 0 . 5 1 ) 0 . 0 1 0 ( 0 . 2 5 ) 8 0 c o p l a n a r i t y 0 . 0 0 4 ( 0 . 1 0 ) 0 . 0 6 5 ( 1 . 6 5 ) 0 . 0 4 9 ( 1 . 2 5 ) 0 . 0 6 9 ( 1 . 7 5 ) 0 . 0 5 3 ( 1 . 3 5 ) 0 . 3 4 5 ( 8 . 7 6 ) 0 . 3 4 1 ( 8 . 6 6 ) 0 . 3 3 7 ( 8 . 5 5 ) 0 . 1 5 8 ( 4 . 0 1 ) 0 . 1 5 4 ( 3 . 9 1 ) 0 . 1 5 0 ( 3 . 8 1 ) 0 . 2 4 4 ( 6 . 2 0 ) 0 . 2 3 6 ( 5 . 9 9 ) 0 . 2 2 8 ( 5 . 7 9 ) 0 8 - 1 9 - 2 0 0 8 - a figure 27 . 20- lead shrink small outline package [qsop] (rq - 20) dimensions shown in inches and (millimeters) ordering guide model 1 number of inputs, v dd1 side number of inputs, v dd2 side maximum data rate maximum propagation delay, 5 v maximum pulse width d istortion temperature range package description package option ADUM7640arqz 6 0 1 mbps 20 ns 75 ns ? 40c to +105c 20 - lead qsop rq - 20 ADUM7640arqz - rl7 6 0 1 mbps 20 ns 75 ns ? 40c to +105c 20 - lead qsop, 7 tape and reel rq - 20 ADUM7640crqz 6 0 25 mbps 14 ns 50 ns ? 40c to +105c 20 - lead qsop rq - 20 ADUM7640crqz - rl7 6 0 25 mbps 14 ns 50 ns ? 40c to +105c 20 - lead qsop, 7 tape and reel rq - 20 adum7641arqz 5 1 1 mbps 20 ns 75 ns ? 40c to +105c 20 - lead qsop rq - 20 adum7641arqz - rl7 5 1 1 mbps 20 ns 75 ns ? 40c to +105c 20 - lead qsop, 7 tape and reel rq - 20 adum7641crqz 5 1 25 mbps 14 ns 50 ns ? 40c to +105c 20 - lead qsop rq - 20 adum7641crqz - rl7 5 1 25 mbps 14 ns 50 ns ? 40c to +105c 20 - lead qsop, 7 tape and reel rq - 20 adum7642arqz 4 2 1 mbps 20 ns 75 ns ? 40c to +105c 20 - lead qsop rq - 20 adum7642arqz - rl7 4 2 1 mbps 20 ns 75 ns ? 40c to +105c 20 - lead qsop, 7 tape and reel rq - 20 adum7642crqz 4 2 25 mbps 14 ns 50 ns ? 40c to +105c 20 - lead qsop rq - 20 adum7642crqz - rl7 4 2 25 mbps 14 ns 50 ns ? 40c t o +105c 20 - lead qsop, 7 tape and reel rq - 20 adum7643arqz 3 3 1 mbps 20 ns 75 ns ? 40c to +105c 20 - lead qsop rq - 20 adum7643arqz - rl7 3 3 1 mbps 20 ns 75 ns ? 40c to +105c 20 - lead qsop, 7 tape and reel rq - 20 adum7643crqz 3 3 25 mbps 14 ns 50 ns ? 40 c to +105c 20 - lead qsop rq - 20 adum7643crqz - rl7 3 3 25 mbps 14 ns 50 ns ? 40c to +105c 20 - lead qsop, 7 tape and reel rq - 20 1 z = rohs compliant part. ? 2012 analog devices, inc. all rights reserved. trademarks and registered tr ademarks are the property of their respective owners. d10448 - 0 - 9/12(0) www.datasheet.net/ datasheet pdf - http://www..co.kr/

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